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Yes, the clock ICs’ outputs can be just left open if they are not used. In this way can save the un-used buffer output drawing power without driving anything.
It is recommended to use 4.7k for pull-up and 1k for pull-down even though Clock IC has internal pull-up/down as high reliability design guide, include un-used inputs pins.
FCP is Frequency Control Product. They include crystals, crystal oscillators (XO), voltage control oscillators (VCXO), and TCXO. XO has IC and crystal integrated together as a component for quality easy use in system designs. For more product information, please visit company website: https://www.diodes.com/products/connectivity-and-timing/crystal-and-crystal-oscillator/
LVPECL is Low Voltage Positive (supply) Emitter Couple Logic. Its voltage level is around 2V+/-400mV and the most use termination is 150 ohm pull-down at output pin and AC or DC coupling to an equivalent 100 ohm across pair at RX ASIC side. Check ASIC datasheet to prevent double termination.
The PI3L301D is suggested for Gigabit Ethernet applications. The PI3L301D has the lowest combination of both R-on and C-on in the LAN switch market, resulting in lowest return-loss which exceeds the requirement for the IEEE 802.3ab Gigabit PHY conformance tests spec.
It is recommended to use the PI3L110 switch for both of the 100 Base FX application with PECL signal and the 100 Base TX application. PI3L110 switch can pass through both these signals without clipping.
