PI7C8148B (Obsolete)

Product Description

The PI7C8148B is a PCI-to-PCI Bridge, designed to be fully compliant with the 32-bit, 66MHz implementation of the PCI Local Bus Specification, Revision 2.3. The PI7C8148B supports synchronous and asynchronous bus transactions between devices on the Primary Bus and the Secondary Buses operating up to 66MHz. In synchronous mode, both primary and secondary buses must operate at the same frequency. The primary and secondary buses can also operate in concurrent mode, resulting in added increase in system performance.

Features

• 32-bit Primary and Secondary Ports run up to 66MHz
• Compliant with the PCI Local Bus Specification, Revision 2.3
• Compliant with PCI-to-PCI Bridge Architecture Specification, Revision 1.1.
• All I/O and memory commands
• Type 1 to Type 0 configuration conversion
• Type 1 to Type 1 configuration forwarding
• Type 1 configuration write to special cycle conversion
• Compliant with the Advanced Configuration Power Interface (ACPI)
• Compliant with the PCI Power Management Specification, Revision 1.1
• Compliant with the PCI Mobile Design Guide, Revision 1.1
• Synchronous and Asynchronous operation support 
• Supported modes of asynchronous operation
  

  Primary (MHz)	Secondary (MHz)
  25MHz to 66MHz	25MHz to 66MHz

• Supported modes of synchronous operation
  

  Primary (MHz)	Secondary (MHz)
  66	66
  50	50
  33	33
  25	25

• Provides internal arbitration for four secondary bus masters
• Programmable 2-level priority arbiter 
• Supports serial EEPROM interface for register auto-load and VPD access
• Dynamic Prefetching Control
• Supports posted write buffers in all directions
• Four 128 byte FIFO’s for delay transactions
• Two 128 byte FIFO’s for posted memory transactions
• Enhanced address decoding
• 32-bit I/O address range
• 32-bit memory-mapped I/O address range
• 64-bit prefetchable address range
• Extended commercial temperature range 0°C to 85°C
• 3.3V and 5V signaling
• 160-pin LFBGA package