| ID |
Subject: |
Question: |
Answer: |
| 152 | Benefit | What's the benefits of using LVTC vs. LVT? | LVTC's CMOS
design consumes much less power (60% less) than LVT BiCMOS, and costs less than LVT BiCMOS. |
| 153 | Benefit | Why is SOTiny Gate logic needed? | SOTiny Gate logic
devices can perform simple logic functions and their tiny packages enable them to be conveniently placed where they are needed. These tiny gates can also
provide quick fix to design bugs on board. These benefits make SOTiny Gate logic devices very popular in today's system designs from handheld to large
systems. |
| 154 | Benefit | What are the competitive advantages of Pericom SOTiny
Gate logic over other gate logic families in the market? | Most gate logic suppliers have multiple gate families that cover different voltage and speed ranges
thus increasing the bill of material callouts and inventory cost. Pericom's SOTiny Gate STX family covers broad operating voltage ranges and speeds. The
one single family STX provides all customers needs for single, dual, triple gate logic. |
| 155 | Bus Hold | What is "Bus Hold"? | "Bus Hold" is a feature of the ALVCH
logic family which holds the inputs of devices at their last valid logic state when the drivers go to high-impedance, thus eliminating external pull-up/down
resistors. |
| 156 | Compatibility | Is ALVTC compatible with ALVT BiCMOS logic? | Yes.
ALVTC is compatible with ALVT BiCMOS logic. In comparison, ALVTC consumes much less power than ALVT BiCMOS logic. |
| 157 | Compatibility | Is LCX compatible with other 3.3V CMOS families such as
LVC? | LCX specifications and performance are very similar to other 3.3V CMOS families in the market, such as LVC, LVX etc. In most applications, LCX
and LVC can be used interchangeably. |
| 158 | Compatibility | Is LVTC compatible with BiCMOS LVT logic? | Yes. LVTC
logic has all the required features for "live-insertion" and is compatible with BiCMOS LVT logic. |
| 159 | Current Drive | What are the current drives for ALVC? | ALVC(H) devices
usually come with both -24/24mA and -12/12mA balanced drives to suit different application needs. PI74ALVC(H)16xxx are 24mA drive devices while
PI74ALVC(H)162xxx are 12mA devices. |
| 160 | Current Drive | What are the current drives for FCT logic? | FCT logic
devices are offered in both high drive (-32/+64mA) and balanced drive (-24/+24mA) to suit different application requirements. The 24mA balanced drive
FCT devices have 25-ohm equivalent output resistance built in to match the transmission line impedance, therefore eliminating the need for external
termination resistors. |
| 161 | Current Drive | Why does ALVTC have high current drive? | ALVTC has
high current drive (-32mA/64mA), so as to achieve fast speeds in heavy load applications. |
| 162 | Edge Control | What is the edge control circuit? | An edge control circuit is
inside the buffer output circuit for dynamic output impedance which varies dependent on the output voltage for overshoot and undershoot reduction while
retaining fast rising and falling edges. |
| 163 | Hot Plug | What is hot-plug? | Hot-plug indicates that the power and
signals applied to the connector on the motherboard (backplane) will be turned off during hot-insertion, thus there is no power and signal activity on the
connectors during hot-insertion while the system is still running. |
| 164 | Hot-swap | What is hot-swap (live-insertion)? | Hot-swap (live-insertion)
indicates that the connectors on the motherboard (backplane) are alive with signal and power during hot-swap. The logic drivers populated on the hot-swap
card should tolerate the impact from hot-swap without clamping or distorting the signal from the motherboard. Pericom PI74LVTC logic family is suitable for
hot-swap. Please refer to the PCI standards "Compact PCI Hot-Swap Specification R1.0", "PCI Hot-Plug specification R1.0" and Pericom Application Brief 39 for more details. |
| 165 | I/O Tolerant | Is LVTC logic 5V I/O Tolerant? | Yes. LVTC logic devices
are 5V I/O Tolerant and can be used in a mixed-voltage environment. |
| 166 | I/O Tolerant | Is LCX logic 5V I/O Tolerant? | Yes. LCX logic devices are
5V I/O Tolerant and can be used in a mixed-signal environment. |
| 167 | I/O Tolerant | Are ALVC devices I/O Tolerant? | Most ALVC/ALVCH
devices are not 5V I/O Tolerant. However, several Pericom ALVCT/ALVCHT devices are 5V I/O Tolerant. |
| 168 | IBIS | Why do I need to simulate the IBIS model? | It is for system
signal integrity and system timing. IBIS model simulation provides the fast, simple, and accurate PCB timing results for any particular driver and receiver with
any combination of frequency, trace length, capacitive load, and other parameters before the PCB is made. This will reduce the system design cycle and
prevent the second or third PCB spin as normally seen in old system design approaches without simulation. |
| 169 | Key Features | What are the key features of ST, STX families? | CMOS,
ultra small package, 1.65V to 3.6V (ST) or 1.65V to 5.5V (STX), 1.8ns to 2.4ns propagation delay, low power dissipation, low noise, -24/+24mA or
-32/+32mA balanced output drive. |
| 170 | Key Features | What are the key features of AVC+ family? | CMOS, 1.65V
to 3.6V, 1.9ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive. AVC+ (Advanced Very-Low Voltage CMOS Plus) logic
provides operating voltages from 1.65V to 3.6V with improved noise-reduction on the output. It comes with -24mA/24mA balanced drive and is I/O Tolerant to
3.6V. |
| 171 | Key Features | What are the key features of FCT family? | CMOS, 3.3V
(FCT3) or 5V (FCT5), 3.2ns to 7ns propagation delay, low power dissipation, -32/+64mA high drive, -12/+12mA or -24/+24mA balanced output drive, bus
hold. FCT (Fast CMOS Technology) is a 5V logic family with TTL compatible input and output levels. It's the fastest 5V CMOS logic family available today in
the market. |
| 172 | Key Features | What are the key features of VCX family? | CMOS, 1.8V to
3.6V, <2ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive. |
| 173 | Key Features | What are the key features of ALVCT family? | ALVCT is the
same with ALVC but with 5V tolerance. |
| 174 | Key Features | What are the key features of ALVTC family? | CMOS, 2.3V
to 3.6V, 2.8ns propagation delay, low power dissipation, -32/+64mA output drive, 5V I/O tolerance, and bus hold. |
| 175 | Key Features | What are the key feature of SSTVF family? | CMOS DDR
registers, 2.3V to 2.7V, ultra fast 1.1ns to 2.2ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive. |
| 176 | Key Features | What are the key features of LVTC family? | CMOS, 2.7V to
3.6V, 3.3ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive, bus hold. LVTC (Low Voltage Technology CMOS) is a
3.3V CMOS logic designed for "live-insertion" applications. LVTC power-up/down high-impedance feature protects the components and the main boards
from being damaged during live-insertion. |
| 177 | Key Features | What are the key features of SSTV family? | CMOS DDR
registers, 2.3V to 2.7V, 1.Xns to 2.8ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive. |
| 178 | Key Features | What are the key features of LCX family? | CMOS, 2.0V to
3.6V, 4.5ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive, 5V tolerance. LCX (Low Voltage, High-Speed) is a 3.3V
widely used high-speed, balanced-drive, lower power and low noise family. |
| 179 | Key Features | What are the key features of LPT family? | CMOS, 3.3V,
4.1ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive, 5V tolerance, bus hold. |
| 180 | Key Features | What are the key features of LVC family? | CMOS, 1.65V to
3.6V, 4.5ns propagation delay, low power dissipation, low noise, -24/+24mA balanced output drive, 5V tolerance. |
| 181 | Key Features | What are the key features of ALVC family? | CMOS 2.3V to
3.6V, <3ns propagation delay, low power dissipation, low noise, -12/+12mA or -24/+24mA balanced output drive, 5V tolerance (ALVCT), bus hold (ALVCH).
ALVC (Advanced Low-Voltage CMOS) is a very fast 3.3V CMOS logic family. ALVCH has "Bus Hold" on the inputs that eliminates external pull-up/down
resistors. |
| 182 | Live Insertion | Which Pericom logic family is suitable for live-insertion? | The PI74LVTC and PI74LVCC families are suitable for live-insertion. Please refer to application note 62 for more details. |
| 183 | Live Insertion | How does LVTC logic provide "live insertion" protection? | LVTC's inputs and outputs are designed with power-up/down control circuits, which senses the device's Vcc supply voltages and put the inputs/outputs in
high-impedance during the power up/down stages of live insertion/extraction. This will avoid the backflow of damaging current into the device and through
the device to other components, and prevent driver conflict. Application Note 62 for more details. |
| 184 | Live Insertion | What will happen in a live-insertion application using a normal
CMOS driver without live-insertion protection circuit? | It is not recommended to use a normal CMOS driver without live-insertion protection circuit because
the signal from the motherboard (backplane) applied to the driver output will be forwarded by the parasitic diode in the PMOS to the Vcc at 0V delayed by the
bypass capacitance. Please refer to application note 62 and application brief 39 for more details. |
| 185 | Matching trace impedance | How to match the impedance of a logic driver and its output
trace? | The output impedance of the driver plus the series termination resistor at the output of the driver must equal the impedance of the trace: Z_out +
Z_termination = Z_trace. For instance, if the Z_trace is 50-ohm and the Z_out is 20-ohm: 20 + Z_termination = 50; Z_termination = 30-ohm. Thus in order to
match the impedance of the driver and the trace, we need to add a 30-ohm series termination resistor at the output of the driver. |
| 186 | Matching trace impedance | Why do I need to match the impedance of a Logic driver and
its output trace (transmission line)? | Otherwise overshoot, undershoot, or attenuation will be seen at the input of the receiver on the end of the trace. |
| 187 | Matching trace impedance | How do I choose the termination resistance for a driver with
unbalanced PMOS and NMOS? | The driver's output impedance R_out for the NMOS and PMOS are 10-ohm and 20-ohm, use 15-ohm for their averaged
output impedance, and then match the 15-ohm with the trace impedance by adding a series termination resistor at the output of the driver: R_out +
R_termination = Z_trace. If the trace impedance is 50-ohm, use 35-ohm for the series termination resistor. |
| 188 | Matching trace impedance | How can I get the output impedance of a trace? | The trace
impedance can be controlled by the PCB layout design and the PCB manufacturer. Please refer to Application Note
32 for the calculation details. |
| 189 | Matching trace impedance | What happens if the impedance of the trace is higher than
the sum of the impedance of the driver and the series termination resistor? | If the impedance of the trace is higher than the sum of the impedance of the
driver and the series termination resistor, overshoot and undershoot will be seen at the input of the receiver on the end of the trace. |
| 190 | Matching trace impedance | Do I need to match the impedance of a driver and its trace
with heavy capacitive load? | When the capacitive load is heavy, higher than 50pf, the RC effect generated by the driver's output impedance, and the
capacitive load will override the transmission line effect causing slow edges but will also help to absorb or averaging the overshoot and undershoot.
Therefore reduce or even cancel the series termination resistance at the output of the driver from its matching value is essential for faster system time. |
| 191 | Matching trace impedance | What happens if the impedance of the trace is lower than the
sum of impedance of the driver and the series termination resistor? | If the impedance of the trace is lower than the sum of the impedance of the driver and
the series termination resistor, attenuated slower edges will be seen at the input of the receiver on the end of the trace. |
| 192 | Matching trace impedance | Where can I get the output impedance of a Logic driver? | There are two approaches to obtain the output impedance of a Logic driver: Extract the R-on from the V-I data in the IBIS model (available on the web),
which is preferred because it is faster and easier; Or register/login to the website to obtain technical assistance. |
| 193 | Maximum trace length | What is the maximum trace length that a logic device can
drive? | It depends on the frequency and the capacitive load, the higher the frequency and capacitive load, the shorter the maximum trace length. The best
way to determine the maximum trace length is to simulate the IBIS model. |
| 194 | Maximum working frequency | What is the maximum working frequency of a logic driver if
it was not specified in the datasheet? | Due to its characteristics, the maximum working frequency of a logic driver is dependent on many application
parameters including the output trace length and the capacitive load. Normally, if the output trace length is less than 4 and the capacitive load is less than
15pf, the maximum working frequency for a logic device can go up to 150MHz-200MHz depending on the device type. But the best way to determine the
maximum working frequency is to simulate the IBIS model with a particular application circuit. |
| 195 | Noise | What is the noise level for LCX output? | LCX has very low
noise on its outputs. The typical VOLP (Output Ground Bounce) is less than 0.8V. |
| 196 | Operating Voltage | Can ALVTC operate at different voltages? | Yes. ALVTC is
designed to operate from 1.65V to 3.6V with 2.5V nominal voltage. Thus, ALVTC can be used as standard 1.8V or 3.3V logic as well. |
| 197 | Operating Voltage | Can AVC+ operate at different voltages? | Yes. AVC+ can
operate from 1.65V to 3.6V with a 2.5V nominal operating voltage. The wide operating voltage range makes AVC+ suitable for 1.8V, 2.5V or 3.3V
operation. |
| 198 | Output Impedance | How to extract the output impedance R_out of the NMOS and
PMOS from IBIS model? | For the R_on of NMOS: in the IBIS model, find the [pulldown] data in the model_type output or model_type 3-state, calculate the
R_out by using the [pulldown] voltage data at 0.5V, but also at Vdd 0.5V, both divided by their current data I(typ), then, averaging the R_out at 0.5V and at
Vdd-0.5V for the final R_out. For example, for the R_out of PI6C2510-133EL, download the IBIS model 6c2510el.ibs from Pericom's website, using the data
in model_type output (Model 2510E_OUT1), the R_out at 0.5V and at 2.8V (Vdd-0.5V = 2.8V) is: At 0.5V: 0.49841V / 0.0211535A = 23.56-ohm. At 2.8V:
2.79932V / 0.0855804A = 32.71-ohm. The average output impedance R-on for the NMOS is: (23.56-ohm + 32.71-ohm)/2 = 28.13-ohm. The calculation of
the PMOS is the same with the NMOS, but using the [pullup] data in the same model of a model_type output. . At 0.5V: |0.498471V / -0.0208299A| =
23.93-ohm. At 2.8V: | 2.79934V / -0.0901073A| = 31.06-ohm. The average output impedance R_on for PMOS is (23.93-ohm + 31.06-ohm)/2 = 27.49-ohm |
| 199 | Output jitter | How to minimize the logic drivers's output jitter? | Heavy
Vcc ripple and ground bounce will cause output jitter. Using sufficient bypass (de-coupling) capacitors, recommended 0.47uf and 0.1uf as close to the Vcc
pin as possible, will minimize the Vcc ripple and ground bounce. Please refer to application note 24 for more details. |
| 200 | Overshoot tolerance | What is the maximum overshoot voltage that a logic device
can tolerate? | The maximum voltage is listed in the maximum ratings in the datasheet. |
| 201 | Package Marking | Why is the top-marking on my package different from the
FCT part number I ordered? | FCT part number ordering nomenclature is "PI74FCTxxx"+"Speed grade"+"T"+"Package code". However, during the
manufacturing process, the "Speed grade" is marked after the "Package code" as "PI74FCTxxx"+"T"+"Package code"+"Speed grade". See the packaging section of the website for detailed explanation. |
| 202 | Power bypass | What is the suggested power bypass capacitance for
Pericom logic devices? | It is recommended to use a 0.47uf and a 0.1uf as close to the Vcc pin as possible for Vcc ripple cancellation. Vcc ripples will
cause output jitter. Please refer to application note 24 for more details. |
| 203 | Power sequencing requirements | What is power sequencing? | Power sequencing indicates
that the power voltages in a multi-power system are not ramping up at the same time, therefore signals from difference power source applied to a device
while its Vcc is not reaching nominal voltage yet and causing problem. |
| 204 | Propagation delay of DDR register | What is the most crucial parameter for a high-speed DDR
module register? | It is proven by many real application cases that the short propagation delay is the key parameter for a high-speed DDR register. It was
seen that even if a 100ps longer propagation from a register failed the DDR module, the shorter the better. In a high-speed DDR module, there is very little
margin left for setup time due to the short duty cycle at high-speed, but also the RC delay from many memory chips driven by one register driver. Pericom's
DDR module register PI47SSTVF16857 and PI47SSTVF16859 are the fastest registers in the market, and are the proven "silver bullet" of resolving DDR
module timing problems seen in critical timing system at four corner test. |
| 205 | SOTiny Gate | What is SOTiny Gate logic? | Pericom SOTiny Gate logic
consists of single, dual, and triple gate logic devices. These devices have broad operating voltages (1.65V to 5.5V) and very fast speeds (1.8ns to 3.2ns),
and come in very small packaging. Pericom offers two SOTiny Gate families: ST (single gate) and STX (single, dual and triple gates). |
| 206 | Speed | How fast is ALVC(H) Logic? | The max propagation delays
for ALVC(H) are from 3.0ns (for buffers) to 5.0ns. |
| 207 | Speed | How fast is the speed for SOTiny Gate logic? | SOTiny Gate
ST (1.65 to 3.6V) family has a typical propagation delay of 1.8ns, while the STX (1.65 to 5.5V) family has typical propagation delays from 2.4ns to 3.2ns.
They are one of the fastest speed gate logic available in the market. |
| 208 | Speed | How fast is the speed for FCT logic? | FCT logic devices are
offered in several different speed grades: Blank, A, B, C, D and E. For a buffer device, the max. propagation delay for Blank speed is 8.0ns and that for E
speed is 3.2ns. Contact factory for availability. |
| 209 | Speed | How fast is the speed for ALVTC? | The max. propagation
delays for ALVTC ranges from 2.6ns (for buffers) to 4.2ns. It is very fast. |
| 210 | Speed | How fast is AVC+ logic? | The max propagation delays for
AVC+ is from 1.9ns (for buffers) to 3.2ns. It is very fast. |
| 211 | Speed | How fast is the speed for LCX? | LCX is a high-speed logic
family. The max. propagation delay for a buffer device is 4.5ns. |
| 212 | Undershoot Tolerance | What is the maximum undershoot current that a logic driver
can tolerate? | The undershoot current is meanly generated by the undershoot going through the ESD diode between the input (or output) to the ground. The
ESD diode can tolerate an undershoot current at forwarding direction and with short duration up to 250mA, which exceeds most of the maximum undershoot
current, even if it was from a very strong driver. |
| 213 | Undershoot Tolerance | Can a logic driver tolerate a heavy undershoot? | Yes, a
logic driver can tolerate heavy undershoot with short duration because there is an ESD diode between the input or output of the driver and ground in reversal
direction. This ESD diode will clamp and absorb the undershoot when the undershoot reaches below -0.7V. Please also refer to the maximum ratings
specified in the datasheet. |
| 214 | Unused input and output | What do I do with the unused input, output and I/O pins? | Leave the unused output pins open; connect the unused sole input pins to Vcc or ground with a trace or a 10K to 100K resistors. For unused I/O pins, if it is
set High-Z, connect it to Vcc or ground through a 10K to 100K resistor, or leave it open if it is active. |
| 215 | Voltage Level Shifting | What is voltage level shifting? | Bidirectional level shifters
can shift signals between 1.5V, 1.8V, 2.5V and 3.3V. They can also translate between HSTL, SSTL and LVCMOS logic standards. |
| 216 | Voltage Level Shifting | Can I reverse the Vcc voltages supplied to VccA and VccB
of the voltage shifter PI74AVC164245? | No, the Vcc voltage supplied to VccA and VccB of PI74AVC164245 can not be reversed, please comply with the
Vcc requirement specified in datasheet. |
| 217 | Voltage Level Shifting | What is the advantage of using a logic voltage level shifter
versus using a switch voltage translator? | Compared to a passive switch voltage translator, a logic voltage level shifter can drive longer trace with higher
capacitive load at higher frequency, due to its active driving output. It is also capable of translating a voltage level from both high to low, and low to high. |
| 218 | Voltage Level Shifting | What is the disadvantage of using a logic voltage level
shifter versus using a switch voltage translator? | A logic voltage level shifter has longer propagation delay and requests a direction control signal. |
| 570 | Input signal voltage range | Can the PI74FCTxx logic devices work with 3.3V inputs and
power? | The PI74FCTxx logic devices can accept a 3.3V input as valid high since their spec of Vih is minimum 2.0V. But the PI74FCTxx logic devices can
not work at 3.3V Vcc. |
| 571 | Maximum operation frequency range | How to determine the operation frequency range of a
device? | Most Pericom logic devices can work at a frequency above 133 MHz. Normally, the maximum frequency depends on the timing and switching
characteristics such as Tpd, Tsetup, Thold, etc. The maximum frequency also depends on the system condition, including the driver strength, the capacitive
load and the trace/cable length, etc. At system level, the best way to determine the maximum frequency is to simulate the IBIS model of the logic device in
the system topology. |
| 572 | Package Information | Where can I find the package marking, ordering info, and
package dimensions for logic devices? | All packaging mechanicals, top marking, ordering details, thermal data, Pb-free, Tape and Reel, and more can be
found at www.pericom.com/packaging |
| 573 | Pb-free | Where can I find the information on your Pb-free and
'Green' packaging? | Lead (Pb)-Free and Green information can be found on individual datasheets or www.pericom.com/pbfree |
| 574 | Power Supply | Will the device be damaged if only one of the VCCA or
VCCB pins is powered while the other is not? | The PI74AVC164245 / PI74AVC164245LA level shifters will not be damaged if only one of the VCCA or
VCCB pins is powered while the other not. |
| 575 | Product Change | Where can I find the product change and discontinuation
notices? | Product Change, and Discontinuation/Obsolete/EOL Notices and details can be found on http://www.pericom.com/quality/pcn.php Or use the
search tool at top of webpage |
| 576 | Shortening output pins | Can I short several driver outputs together in order to drive a
50-ohm load? | For many of Pericom's logic drivers, buffers and inverters, it is allowed to shorten a few of the output pins in order to increase the driver
strength for heavy resistive or capacitive load, but the maximum current and power consumption must meet the spec of the logic device. |
| 577 | Theta JA | Where can I find the Thermal Resistance values (Theta JA,
JC) and Mean Time between Failure Rate for doing Thermal & Reliability calculations? | Theta JA and JC can be found at the following link:
http://www.pericom.com/products/packaging/mechanicals.php Other quality information can be found at http://www.pericom.com/quality/index.php |
| 578 | Voltage Level Shifting | Can I apply any voltage in the nominal range (1.8V-2.5V for
PI74AVC164245, and 1.5V-2.5V for PI74AVC164245LA) to the VCCA pin? For example, can I apply 2.0V to VCCA? | The voltage applied to the VCCA pin
can be any voltage in the nominal voltage range, for example, it is ok to apply 2.0V to the VCCA pin of PI74AVC164245, since the 2.0V Vcc falls in the
nominal range of the 1.8V to 2.5V. |
| 579 | Voltage Level Shifting | Can PI47AVC164245LA / PI47AVC164245LA be used for
3.3V to 1.8V level shifting for a clock signal? | All the logic level shifters can be used for clock signal level shifting. Please ensure that the spec of the output
duty cycle of the level shifter meets the clock application request. Using a 0.1uf and a 0.47uf capacitor at each of the VCCA/VCCB pins as close as possible
for minimum jitter from the Vcc to the output. |
| 606 | Input signal voltage range | Can the PI74FCTxx logic devices work with 3.3V inputs and
power? | The PI74FCTxx logic devices can accept a 3.3V input as valid high since their spec of Vih is minimum 2.0V. But the PI74FCTxx logic devices can
not work at 3.3V Vcc. |
| 607 | Maximum operation frequency range | How to determine the operation frequency range of a
device? | Most Pericom logic devices can work at a frequency above 133 MHz. Normally, the maximum frequency depends on the timing and switching
characteristics such as Tpd, Tsetup, Thold, etc. The maximum frequency also depends on the system condition, including the driver strength, the capacitive
load and the trace/cable length, etc. At system level, the best way to determine the maximum frequency is to simulate the IBIS model of the logic device in
the system topology. |
| 608 | Packaging Information | Where can I find the package marking, ordering info, and
package dimensions for logic devices? | All packaging mechanicals, top marking, ordering details, thermal data, Pb-free, Tape and Reel, and more can be
found at www.pericom.com/packaging |
| 609 | Pb-free | Where can I find the information on your Pb-free and
“Green” packaging? | Lead (Pb)-Free and Green information can be found on individual datasheets or www.pericom.com/pbfree |
| 610 | Power Supply | Will the device be damaged if only one of the VCCA or
VCCB pins is powered while the other is not? | The PI74AVC164245 / PI74AVC164245LA level shifters will not be damaged if only one of the VCCA or
VCCB pins is powered while the other not. |
| 611 | Product Change | Where can I find the product change and discontinuation
notices? | Product Change, and Discontinuation/Obsolete/EOL Notices and details can be found on http://www.pericom.com/quality/pcn.php Or use the advanced search. |
| 612 | Shortening output pins | Can I short several driver outputs together in order to drive a
50-ohm load? | For many of Pericom's logic drivers, buffers and inverters, it is allowed to shorten a few of the output pins in order to increase the driver
strength for heavy resistive or capacitive load, but the maximum current and power consumption must meet the spec of the logic device. |
| 613 | Theta JA and Theta JC | Where can I find the Thermal Resistance values (Theta JA,
JC) and Mean Time between Failure Rate for doing Thermal & Reliability calculations? | Theta JA and JC can be found at the following link: www.pericom.com/products/packaging/mechanicals.php. Other Other quality information can be found at www.pericom.com/quality/ |
| 614 | Voltage Level Shifting | Can I apply any voltage in the nominal range (1.8V-2.5V for
PI74AVC164245, and 1.5V-2.5V for PI74AVC164245LA) to the VCCA pin? For example, can I apply 2.0V to VCCA? | The voltage applied to the VCCA pin can be any voltage in the nominal voltage range, for example, it is ok to apply 2.0V to the VCCA pin of PI74AVC164245, since the 2.0V Vcc falls in the nominal range of the 1.8V to 2.5V. |
| 615 | Voltage Level Shifting | Can PI74AVC164245 / PI74AVC164245LA be used for 3.3V to 1.8V level shifting for a clock signal? | All
the logic level shifters can be used for clock signal level shifting. Please ensure that the spec of the output duty cycle of the level shifter meets the clock
application request. Using a 0.1uf and a 0.47uf capacitor at each of the VCCA/VCCB pins as close as possible for minimum jitter from the Vcc to the
output. |
